Whereas not absolutely the first firm available in the market to speak about placing several types of silicon inside the identical package deal, AMD’s launch of Ryzen 3000 again in July 2019 was a primary in bringing excessive efficiency x86 computing by means of the medium of chiplets. The chiplet paradigm has labored out very properly for the corporate, having excessive efficiency cores on optimized TSMC 7nm silicon, whereas farming the extra analog operations to cheaper GlobalFoundries 14nm silicon, and constructing a excessive pace interconnect between them. In comparison with a monolithic design, AMD finally ends up utilizing the higher course of for every function, smaller chips that afford higher yields and binning, and the most important price adder turns into the packaging. However how low price can these chiplet designs go? I put this query to AMD’s CEO Dr. Lisa Su.
In AMD’s consumer-focused product stack, the one merchandise it ships with chiplets are the high-performance Ryzen 3000 and Ryzen 5000 collection processors. These vary in worth from $199 for the six-core Ryzen 5 3600, as much as $799 for the 16-core Ryzen 9 5950X.
Every thing else shopper targeted is a single piece of silicon, not chiplets. Every thing in AMD’s cellular portfolio depends on single items of silicon, and they’re additionally migrated into desktop kind components in AMD’s desktop APU technique. We’re seeing a transparent delineation between the place chiplets make monetary sense, and the place they don’t. From AMD’s newest technology of processors, the Ryzen 5 5600X remains to be a $299 price at retailers.
One of many points right here is {that a} chiplet design requires further packaging steps. The silicon from which these processors are made have to sit down in a PCB or substrate, and relying on what you wish to do with the substrate can affect its price. Chiplet designs require excessive pace connections between chiplets, in addition to energy and communications to the remainder of the system. The act of placing the chiplets on a singular substrate additionally has an efficient price, requiring accuracy – even when 99% correct placement per chiplet on a substrate means a 3 chiplet product as a 3% yield loss from packaging, elevating prices. Past this, AMD has to ship its 14nm dies for its merchandise from New York to Asia first, to package deal them with the TSMC compute dies, earlier than transport the ultimate product world wide. That is perhaps diminished in future, as AMD is about to make its next-generation chiplet designs all inside Asia.
In the end there needs to be a tipping level the place merely constructing a monolithic silicon product turns into higher for complete price than attempting to ship chiplets round and spend plenty of cash on new packaging strategies. I requested the query to Dr. Lisa Su, acknowledging that AMD doesn’t promote its newest technology under $300, as as to if $300 is the practical tipping level from the chiplet to the non-chiplet market.
Dr. Su defined how of their product design levels, AMD’s architects have a look at each doable approach of placing chips collectively. She defined that this implies monolithic, chiplet, packaging, course of applied sciences, because the variety of potential variables in all of this have direct knock-on results for provide chain and price and availability, in addition to the tip efficiency of the product. Dr. Su acknowledged quote succinctly that AMD appears for what’s greatest for efficiency, energy, price – and what you say on the tipping level could also be true. That being stated, Dr. Su was eager to not instantly say that is the norm, detailing that she would anticipate sooner or later that the dynamic may change as silicon prices rise, as this modifications that optimization level. But it surely was clear in our discussions that AMD is at all times trying on the variables, with Dr. Su ending on a contented observe that at the precise time, you’ll see chiplets on the decrease finish of the market.
Personally, I believe it’s fairly telling that the market may be very malleable to chiplets proper now within the $300+ ecosystem. TSMC D0 yields of N7 (and N5) are reportedly a few of the business greatest, which signifies that AMD’s cellular processors within the ~200 sq mm vary can roll off the manufacturing line and cater for all the pieces as much as that $300 worth (and maybe some past). Going larger brings in die dimension yield constraints, the place chiplets make sense. We’re now in at a stage the place if Moore’s Regulation continues, how a lot compute can we slot in that 200 sq mm sized silicon, and which markets can profit from it – or are we going to get to a degree the place so many extra options are added that silicon sizes would enhance, essentially pushing all the pieces down the chiplet route. As a part of the dialogue, Dr. Su talked about economies of scale in the case of packaging, so it will likely be fascinating to see how this dynamic shakes out. However for now it appears, AMD’s technique to handle the sub-$300 market goes to be with both final technology {hardware}, or monolithic silicon.